A register has no minus sign, so negative integers need a representation of their own. One's complement and two's complement both use the leftmost bit for the sign, but only two's complement lets the processor subtract by simply adding. Learn both, then add, subtract and spot overflow.
In two's complement the most significant bit has a negative place value: in 8 bits it is −128, so the range is −128 to +127. To negate a number, invert every bit (this alone gives the one's complement) and then add 1. Subtraction is done by adding the negative: A − B = A + (−B). Overflow occurs when the true result is outside the range: adding two numbers with the same sign gives a result with the opposite sign.
Fig. 1: 11010011 in 8-bit two's complement is −45
Section 01
One's and two's complement.
In the lab's two's complement mode, set the bits and watch the leftmost one count as −128. Try to make the smallest and largest values you can.
One's complement
Two's complement
To negate
Invert every bit
Invert every bit, then add 1
−45 in 8 bits
11010010
11010011
8-bit range
−127 to +127
−128 to +127
Zero
Two zeros: 00000000 and 11111111
One zero: 00000000
Sign
Leftmost bit 0 means positive or zero; leftmost bit 1 means negative
Positive numbers are the same in unsigned binary, one's complement and two's complement, as long as the leftmost bit is 0.
n bits in two's complement hold −2n−1 to 2n−1 − 1: 16 bits hold −32 768 to +32 767.
Quick read: 11111111 is −1 in two's complement, and 10000000 is −128.
Four quick checks. Each correct answer earns XP and records this skill on your profile.
Quick check+10 XP
What is the range of an 8-bit two's complement integer?
Quick check+10 XP
In the lab, what value is 11111111 in two's complement?
Quick check+10 XP
What is the one's complement of 00001111?
Quick check+10 XP
How does a processor normally carry out A − B?
Section 03
When the result will not fit.
Overflow happens when a calculation produces a value the register cannot represent. In the lab, push an unsigned 8-bit sum past 255 and watch the ninth bit fall off the register. In two's complement the same problem shows up as an answer with the wrong sign.
Unsigned: overflow if the sum is more than 255 in 8 bits; a carry out of the leftmost bit signals it.
Two's complement: overflow if the true result is below −128 or above +127. It can only happen when both numbers have the same sign, and the answer then has the wrong sign.
Example: 01100100 + 00110010 is 100 + 50 = 150. The register holds 10010110, which reads as −128 + 16 + 4 + 2 = −106: two positives have produced a negative.
Fixes: use more bits for the result (e.g. a 16-bit register), and have the processor set an overflow flag that the program checks.
Examiner trap
A carry out of the leftmost bit is not the test for overflow in two's complement. Check the signs: overflow only when two positives give a negative or two negatives give a positive.
Stage 2 · Exam
Exam-style questions
Unlocks once the four checks above are done. Worth more XP, written to AS Paper 1 and Paper 2 standard.
Finish the four checks above to unlock the exam questions
Exam style+20 XP
What is −77 in 8-bit two's complement?
Exam style+20 XP
Which 8-bit two's complement addition causes an overflow?
Exam style+20 XP
What is the range of a 12-bit two's complement integer?
Exam style+20 XP
The 8-bit pattern 10000000 is read in one's complement and then in two's complement. What are the two values?
Skill unlocked
Two's complement and binary arithmetic, mastered.
This skill is now recorded on your profile. Keep the chain going.