The shape of the lesson
By the end of the lesson, learners can
- RAM against ROM: Both are primary memory: the CPU can address them directly.
- Static RAM and dynamic RAM: Both types of RAM are volatile.
- PROM, EPROM and EEPROM: Plain ROM has its contents fixed when the chip is manufactured.
- RAM v ROM: volatile and read-write against non-volatile and read-only.
- DRAM: capacitor, leaks, refreshed, cheaper, denser, main memory.
- SRAM: flip-flop, no refresh, faster, more expensive, cache.
- Programmable ROM: PROM once (fuses); EPROM UV light, whole chip, removed; EEPROM electrically, in the circuit.
One picture every idea returns to
RAM (random access memory) is volatile, can be read and written, and holds the operating system, programs and data currently in use. ROM (read only memory) is non-volatile and holds data that must survive power-off, such as the bootstrap program and firmware. DRAM stores each bit as charge on a capacitor, which leaks, so it must be refreshed constantly; it is cheaper and denser, so it is used for main memory. SRAM stores each bit in a flip-flop, needs no refresh and has a faster access time, so it is used for cache. PROM is programmed once; EPROM is erased with ultraviolet light; EEPROM is erased electrically without removing it from the circuit.
Forty-five minutes, phase by phase
| Time | Phase | What happens in the room | Grouping |
|---|---|---|---|
| 0 to 5 min | Hook: predict | Open with the question in the title, Memory that forgets, memory that stays.. Primary memory comes in two families. Put the figure on the board: it is the one picture every idea in the lesson returns to. | Whole class, then pairs |
| 5 to 13 min | Teach and check: RAM against ROM | Both are primary memory: the CPU can address them directly. Your turn: A washing machine has a microprocessor with both RAM and ROM. State what each is used for. | Whole class, then pairs |
| 13 to 21 min | Teach and check: Static RAM and dynamic RAM | Both types of RAM are volatile. Model the worked example Choosing the right RAM on the board, one line at a time. | Pairs |
| 21 to 30 min | Teach and check: PROM, EPROM and EEPROM | Plain ROM has its contents fixed when the chip is manufactured. Your turn: A router's manufacturer wants customers to be able to download and install firmware updates. Which type of ROM should hold the firmware? Give a reason. | Think-Pair-Share |
| 30 to 36 min | Check | The four Stage 1 questions from the student lesson, answered on mini whiteboards or by show of fingers. Re-teach the one most get wrong. | Individual, then whole class |
| 36 to 43 min | Plenary | The exam-style questions from Stage 2, one at a time: thirty seconds alone, then a random call. The feedback lines in the key give the examiner's wording. | Individual, random call |
| 43 to 45 min | Exit and homework | Set the worksheet below (6 questions, 18 marks). Learners self-assess against the objectives before they leave. | Individual |
Protect the parts that carry the learning
The sequence carries about fifty minutes of material, so the lab is driven by one student while the class predicts rather than explored freely. Times are a guide.
Protected: the check at 30 minutes. It is the only individual read on whether the key idea landed, and it is not cut.
Cut first if the build overruns: the last check in PROM, EPROM and EEPROM, never the check or the plenary.
In a 60 minute block: run worksheet questions 1 to 3 in class as a Rally Coach set and model both the hardest worked example and its check live.
Think-Pair-Share
Pose the question, give thirty seconds of silent thinking, then a minute to compare with a partner before a few pairs share with the class. The silent minute is the part that cannot be cut.
The full structure, with its variations and the other twelve, is on the cooperative-learning page.
What to head off, and how
| Trap learners fall into | Teaching move that pre-empts it |
|---|---|
| "Random access" does not mean the data is random. | It means any location can be accessed directly, in the same time, without reading through the others. |
| Both SRAM and DRAM are volatile. "Static" means no refresh is needed while powered, not that data is kept when the power is off. | Return to Static RAM and dynamic RAM: ask a pair to state the correct version and show it on the lab before moving on. |
| EPROM and EEPROM are both reprogrammable. | The mark is for how they are erased: UV light, whole chip, removed against electrically, in place, byte by byte. |
RAM and ROM: SRAM, DRAM, PROM, EPROM and EEPROM: worksheet
6 questions, 18 marks. Written in the style of the papers; no past paper question is reproduced.
State three differences between RAM and ROM.
Explain the differences between static RAM (SRAM) and dynamic RAM (DRAM).
A games console has 16 GiB of main memory and a processor with 32 MiB of cache. Identify the type of RAM used for each and justify your choices.
Describe how PROM, EPROM and EEPROM differ in the way their contents can be changed.
A digital thermostat must remember the user's chosen temperature when the power is cut. The setting may be changed many times. Identify a suitable type of memory and give a reason.
A student writes: "SRAM is called static because it keeps its data when the computer is switched off." Explain the error.
Answer key and marking notes
- RAM is volatile; ROM is non-volatile.
- RAM can be read and written; ROM can only be read (in normal use).
- RAM holds the programs and data currently in use; ROM holds the bootstrap program or firmware. (Or: RAM is usually much larger than ROM.)
- DRAM stores each bit as charge on a capacitor; SRAM stores each bit in a flip-flop.
- DRAM must be refreshed constantly because the charge leaks; SRAM does not need refreshing.
- SRAM has a faster access time than DRAM.
- DRAM is cheaper per bit and has a higher density (more data per chip).
- Main memory: DRAM.
- A large capacity is needed at a reasonable cost, and DRAM is cheaper per bit and denser.
- Cache: SRAM.
- Cache must be very fast to keep up with the processor, and only a small amount is needed, so the higher cost is acceptable.
- PROM can be programmed only once (fuses are blown); its contents can never be changed.
- EPROM can be erased by exposing it to ultraviolet light (whole chip, removed from the device) and then reprogrammed.
- EEPROM can be erased and reprogrammed electrically while still in the circuit (byte by byte).
- EEPROM (or flash memory).
- It is non-volatile, so the setting is kept without power, and it can be rewritten electrically in place each time the user changes it.
- SRAM is volatile: it loses its data when the power is switched off.
- Static means it does not need to be refreshed while the power is on (unlike dynamic RAM).
6 multiple-choice questions on this lesson
From the topic question bank. Assign them in the app for a marked score in your gradebook, or run the topic as a class game.
How does a DRAM cell store a bit?
- AAs charge on a capacitor, which leaks away so it must be refreshed constantly
- BIn a flip-flop made of several transistors, which needs no refreshing
- CAs electrons trapped in a floating gate, kept when the power is off
- DBy blowing a fuse in the chip with a special programming device
Which of these is normally stored in ROM in a desktop computer?
- AThe bootstrap program that starts the computer when it is switched on
- BThe word-processed document the user is currently editing
- CThe parts of the operating system currently in use
- DThe web pages most recently loaded by the browser
A smart thermostat's manufacturer wants customers to install firmware updates downloaded over the internet, without opening the device. Which memory should hold the firmware?
- AEEPROM
- BPROM
- CEPROM
- DDRAM
How is the data in an EPROM chip erased?
- ABy shining ultraviolet light through a window in the chip, which wipes the whole chip once it is removed
- BBy applying a voltage while the chip stays in the circuit, one byte at a time
- CIt cannot be erased; the fuses blown when it was programmed are permanent
- DBy switching off the power, because the chip is volatile
Why is a processor's cache made from SRAM, while its 16 GiB main memory is made from DRAM?
- ASRAM has a faster access time for the small cache; DRAM is cheaper per bit and denser, which suits a large main memory
- BSRAM is non-volatile, so the cache keeps its contents when the computer is switched off
- CDRAM is faster than SRAM, so it is used where the most data has to be moved
- DSRAM needs constant refreshing, which keeps the cache synchronised with the processor clock
A student writes: "Static RAM keeps its data when the power is switched off, which is why it is called static." Which correction is right?
- ASRAM is volatile; static means it holds its data without refreshing only while the power is on
- BThe student is right; SRAM is non-volatile and is used to hold the bootstrap program
- CSRAM is volatile; static means its contents can be read but never changed
- DThe student is right, but only if the SRAM is refreshed before the power is switched off
Quiz key
DRAM holds each bit as charge on a capacitor (one transistor per cell); the charge leaks, so every cell is refreshed many times a second. A flip-flop with no refresh is SRAM. Electrons trapped in a floating gate is flash memory, which is non-volatile. Blowing fuses is how a PROM is programmed.
ROM is non-volatile, so it holds the bootstrap (start-up) program and firmware that must be ready at power-on. The document being edited, the parts of the operating system in use and recently loaded web pages all change constantly and are held in RAM (or cached on secondary storage), not in read-only memory.
EEPROM (including flash) is erased and rewritten electrically while still in the circuit, so software can update it. A PROM can be written only once. An EPROM must be removed and exposed to ultraviolet light to erase it. DRAM is volatile, so the firmware would be lost whenever the power was cut.
An EPROM is removed from the device and erased with ultraviolet light through a quartz window, which wipes the whole chip, then it can be reprogrammed. Electrical erasure in the circuit, byte by byte, describes EEPROM. A chip that can never be erased is a PROM. All ROM types are non-volatile, so switching off does not erase them.
Cache must keep up with the processor, so speed matters most: SRAM is faster and needs no refresh, and its high cost per bit is affordable for a small cache. Main memory needs large capacity at low cost, which DRAM provides. SRAM is volatile, like all RAM. DRAM is slower than SRAM, not faster. It is DRAM, not SRAM, that needs refreshing.
Both SRAM and DRAM are volatile. Static means a flip-flop holds each bit without any refresh while powered, unlike DRAM. SRAM is not used for the bootstrap program, which needs non-volatile ROM. SRAM can be written as well as read; read-only describes ROM. SRAM never needs refreshing, and no refresh could keep data after power-off.
Slides for this lesson
A projectable deck for every pack is on the way. Until then, present the student lesson full screen: its sections, figure and lab tabs follow the same order as the plan above.