The shape of the lesson
By the end of the lesson, learners can
- Where interrupts come from: In the lab, trigger different interrupts while a program runs and watch the processor respond to them in order of priority.
- How an interrupt is handled: Learn this sequence: most interrupt questions give marks for each step in the right order.
- What results: The result of an interrupt depends on what generated it.
- Generated: hardware (key press, mouse) or software (division by zero, memory clash) sends a signal.
- Checked: at the end of the current fetch-decode-execute cycle; compare priorities.
- Handled: save registers, run the interrupt service routine, restore registers.
- Result: the event is dealt with and the original task resumes.
One picture every idea returns to
An interrupt is a signal sent to the processor, by a device or by software, saying that something needs attention. Hardware interrupts come from devices, e.g. pressing a key or moving the mouse. Software interrupts come from programs, e.g. division by zero or two processes trying to access the same memory location. At the end of each fetch-decode-execute cycle the processor checks for interrupts. If one has a higher priority than the current task, it saves the contents of its registers, runs the matching interrupt service routine (ISR), then restores the registers and carries on.
Forty-five minutes, phase by phase
| Time | Phase | What happens in the room | Grouping |
|---|---|---|---|
| 0 to 5 min | Hook: predict | Open with the question in the title, Stop, this first.. When you press a key, the processor is busy doing something else. Put the figure on the board: it is the one picture every idea in the lesson returns to. | Whole class, then pairs |
| 5 to 13 min | Teach and check: Where interrupts come from | In the lab, trigger different interrupts while a program runs and watch the processor respond to them in order of priority. Project tab 7 of the lab (Interrupts and the interrupt service routine) and let a student drive it while the class predicts. | Whole class, then pairs |
| 13 to 21 min | Teach and check: How an interrupt is handled | Learn this sequence: most interrupt questions give marks for each step in the right order. Model the worked example A key press on the board, one line at a time. | Pairs |
| 21 to 30 min | Teach and check: What results | The result of an interrupt depends on what generated it. Your turn: A program tries to calculate Total / Count when Count is 0. State the type of interrupt and a likely result. | Anticipation / Reaction Guide |
| 30 to 36 min | Check | The four Stage 1 questions from the student lesson, answered on mini whiteboards or by show of fingers. Re-teach the one most get wrong. | Individual, then whole class |
| 36 to 43 min | Plenary | The exam-style questions from Stage 2, one at a time: thirty seconds alone, then a random call. The feedback lines in the key give the examiner's wording. | Individual, random call |
| 43 to 45 min | Exit and homework | Set the worksheet below (6 questions, 16 marks). Learners self-assess against the objectives before they leave. | Individual |
Protect the parts that carry the learning
The sequence carries about fifty minutes of material, so the lab is driven by one student while the class predicts rather than explored freely. Times are a guide.
Protected: the check at 30 minutes. It is the only individual read on whether the key idea landed, and it is not cut.
Cut first if the build overruns: the last check in What results, never the check or the plenary.
In a 60 minute block: run worksheet questions 1 to 3 in class as a Rally Coach set and model both the hardest worked example and its check live.
Anticipation / Reaction Guide
Before the lesson, students mark five statements true or false. After the teaching they mark them again and justify any change of mind in one sentence each. The statements come from the examiner traps below.
The full structure, with its variations and the other twelve, is on the cooperative-learning page.
What to head off, and how
| Trap learners fall into | Teaching move that pre-empts it |
|---|---|
| Interrupts are not only for errors. | A key press is an interrupt too: it simply tells the processor there is new input to deal with. |
| Do not say the processor stops immediately. | It finishes the current fetch-decode-execute cycle first, then checks for interrupts. |
Interrupts: worksheet
6 questions, 16 marks. Written in the style of the papers; no past paper question is reproduced.
Give one example of a hardware interrupt and one example of a software interrupt.
Describe how an interrupt is handled by the processor.
A user is printing a report when the printer runs out of paper. Describe how an interrupt is generated and what happens as a result.
Explain why the contents of the registers are saved before an interrupt service routine is run.
Explain why a computer uses interrupts instead of the processor repeatedly checking every device.
Two interrupts arrive at the same time: one from the mouse and one reporting a memory error that could corrupt data. Explain which is serviced first and why.
Answer key and marking notes
- Hardware: pressing a key on the keyboard / moving the mouse / printer out of paper.
- Software: division by zero / two processes trying to access the same memory location.
- The interrupt signal is sent to the processor.
- At the end of the current fetch-decode-execute cycle the processor checks for interrupts and compares the interrupt's priority with the current task.
- If the interrupt has a higher priority, the contents of the registers are saved.
- The appropriate interrupt service routine (ISR) is run.
- The register contents are restored and the original task continues.
- The printer (hardware) generates an interrupt signal and sends it to the processor.
- The processor runs the interrupt service routine for the printer.
- A message is displayed asking the user to add paper; once paper is loaded, printing resumes (meanwhile other tasks continue).
- The ISR will use the registers and would overwrite their values.
- Saving them means they can be restored so the interrupted task can resume exactly where it stopped.
- The processor does not waste time checking devices that have nothing to report, so it can get on with other tasks.
- Urgent events are responded to quickly because they signal the processor themselves (allowing multitasking).
- The memory error is serviced first.
- Interrupts are handled in order of priority, and an error that could corrupt data has a higher priority than a mouse movement.
6 multiple-choice questions on this lesson
From the topic question bank. Assign them in the app for a marked score in your gradebook, or run the topic as a class game.
Which of these generates a software interrupt?
- ATwo processes trying to access the same memory location
- BA key being pressed on the keyboard
- CThe mouse being moved
- DThe printer running out of paper
What is an interrupt service routine (ISR)?
- AThe code that is run to deal with a particular interrupt
- BThe signal a device sends to the processor
- CThe list of interrupts waiting to be handled
- DThe firmware that loads the operating system
A user is printing a report when the printer runs out of paper. What is the most likely result of the interrupt?
- AA message asks the user to add paper, and other tasks carry on meanwhile
- BThe computer restarts so the printer can be reset
- CThe report is deleted because it could not be printed
- DThe processor stops every task until paper is added
Which statement about how a processor handles an interrupt is correct?
- AIt completes the current fetch-decode-execute cycle before checking for interrupts
- BIt stops the current instruction immediately, part-way through
- CIt deals with interrupts in the order they arrived, ignoring priority
- DIt clears its registers to zero before running the ISR
These steps describe how an interrupt is handled, in a jumbled order.
P: the saved register contents are restored
Q: the interrupt service routine is run
R: the interrupt signal is sent to the processor
S: the contents of the registers are saved
T: the interrupt's priority is compared with the current task
Which is the correct order?
- AR, T, S, Q, P
- BR, S, T, Q, P
- CT, R, Q, S, P
- DR, T, Q, S, P
A processor is running a back-up task. Three interrupts are waiting, each with a priority (a higher number means more urgent): mouse moved (2), key pressed (3), memory error that could corrupt data (5). The back-up task has priority 1. What happens next?
- AThe back-up task's registers are saved and the memory error's ISR is run first
- BThe mouse interrupt is handled first because it arrived first
- CThe back-up task finishes completely before any interrupt is handled
- DAll three ISRs are run at the same moment, then the back-up restarts from the beginning
Quiz key
Two processes clashing over one memory location is detected by software, so it is a software interrupt (division by zero is another). A key press, a mouse movement and a printer running out of paper are all signals from hardware devices, so they are hardware interrupts.
Each type of interrupt has its own interrupt service routine: the code that handles the event, for example reading a key code and displaying the character. The signal itself is the interrupt, waiting interrupts are queued, and the firmware that loads the OS is the bootloader.
The printer sends a hardware interrupt; its ISR displays a message asking for paper, and printing resumes once paper is loaded. Meanwhile the processor carries on with other tasks. Nothing needs to restart, the document is not deleted, and the processor does not freeze while waiting.
Interrupts are checked at the end of each fetch-decode-execute cycle, so the current instruction is finished first. Interrupts are then serviced by priority, not just arrival order. The register contents are saved, not cleared, so the interrupted task can resume.
The signal is sent (R), then at the end of the cycle the priority is compared (T). If it is higher, the registers are saved (S), the ISR runs (Q) and the registers are restored (P). Saving before comparing priority wastes work if the interrupt has to wait; comparing priority before the signal arrives is impossible; and running the ISR before saving would overwrite the registers.
Interrupts are serviced by priority: the memory error (5) is the most urgent and outranks the back-up task (1), so the back-up's registers are saved and the memory error ISR runs first, followed by the others. Arrival order does not decide this. The back-up does not have to finish first, and it resumes where it stopped (not from the beginning) because its registers are restored.
What to project
The student lesson embeds these tabs. Open them full screen on the projector; every slider has a drag handle on the stage.
Slides for this lesson
A projectable deck for every pack is on the way. Until then, present the student lesson full screen: its sections, figure and lab tabs follow the same order as the plan above.